Clock Multiplexer, 4:1 Differential to LVDS

1:8, LVPECL Output Fanout Buffer

2.4 LVPECL Output Fanout Buffer

2 to 8-Output 3.3V PCIe Zero-Delay/Fanout Buffers

Clock Fanout Buffer

The 853S01I is a high performance 2:1 Differential-to-LVPECL Multiplexer. The 853S01I can also perform differential translation because the differential inputs accept LVPECL and LVDS levels. The 853S01I is packaged in a small 3mm x 3mm 16 VFQFN package, making it ideal for use on space constrained boards.

• One LVPECL output pair
• Two selectable differential LVPECL clock inputs
• PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS
• Translates LVCMOS/LVTTL input signals to LVPECL levels by using a resistor bias network on nPCLKx, nPCLKx
• Part-to-part skew: 150ps (maximum)
• Propagation delay: 490ps (maximum)
• Full 3.3V or 2.5V operating supply
• -40°C to 85°C ambient operating temperature
• Available in lead-free (RoHS 6) packages

The 553S is a low skew, single input to four output, LVCMOS clock buffer. The 553S has best in class additive phase Jitter of sub 50 fsec.

• Low additive phase jitter RMS: 50fs
• Extremely low skew outputs (50ps)
• Low cost clock buffer
• Packaged in 8-pin SOIC and small 8-pin DFN packages, Pb-free
• Input / Output clock frequency up to 200MHz
• Ideal for networking clocks
• Operating voltages: 1.8V to 3.3V
• Output Enable mode tri-states outputs
• Advanced, low power CMOS process
• Extended temperature range (-40°C to +105°C)

The 83026I-01 is a low skew, 1-to-2 Differential-to- LVCMOS/LVTTL Fanout Buffer. The differential input can accept most differential signal types (LVPECL, LVDS, LVHSTL, HCSL and SSTL) and translate to two singleended LVCMOS/LVTTL outputs. The small 8-lead SOIC footprint makes this device ideal for use in applications with limited board space.

• Two LVCMOS / LVTTL outputs
• Differential CLK, nCLK input pair
• CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL
• Maximum output frequency: 350MHz
• Output skew: 15ps (maximum)
• Part-to-part skew: 600ps (maximum)
• Additive phase jitter, RMS: 0.03ps (typical)
• Small 8 lead SOIC package saves board space
• 3.3V core, 3.3V, 2.5V or 1.8V output operating supply
• -40°C to 85°C ambient operating temperature
• Available lead-free RoHS (6) package

The 9DBV0841 is a 1.8V member of Renesas' full featured PCIe family.  It has integrated output terminations providing Zo = 100Ω for direct connection for 100Ω transmission lines. The device has 8 output enables for clock management and 3 selectable SMBus addresses.

• LP-HCSL outputs save 32 resistors; minimal board space and BOM cost
• 62mW typical power consumption in PLL mode; eliminates thermal concerns
• Spread Spectrum (SS) compatible; allows use of SS for EMI reduction
• OE# pins: support DIF power management
• HCSL compatible differential input: can be driven by common clock sources
• Programmable slew rate for each output: allows tuning for various line lengths
• Programmable output amplitude: allows tuning for various application environments
• Pin/software selectable PLL bandwidth and PLL Bypass: minimize phase jitter for each application
• Outputs blocked until PLL is locked: clean system start-up
• Software selectable 50MHz or 125MHz PLL operation: useful for Ethernet Applications
• Configuration can be accomplished with strapping pins: SMBus interface not required for device control
• 3.3V tolerant SMBus interface works with legacy controllers
• Space-saving 6 x 6 mm 48-VFQFPN: minimal board space
• Selectable SMBus addresses; multiple devices can easily share an SMBus segment

The 8S89832I is a high speed 1-to-4 Differential-to-LVDS Fanout Buffer. The 8S89832I is optimized for high speed and very low output skew, making it suitable for use in demanding applications such as SONET, 1 Gigabit and 10 Gigabit Ethernet, and Fibre Channel. The internally terminated differential input and VREF_AC pin allow other differential signal families such as LVPECL, LVDS, and SSTL to be easily interfaced to the input with minimal use of external components. The device also has an output enable pin which may be useful for system test and debug purposes. The 8S89832I is packaged in a small 3mm x 3mm 16-pin VFQFN package which makes it ideal for use in space-constrained applications.

• Four differential LVDS output pairs
• IN, nIN input pairs can accept the following differential input levels: LVPECL, LVDS, SSTL
• 50Ω internal input termination to VT
• Maximum output frequency: 2GHz
• Output skew: 25ps (maximum)
• Part-to-part skew: 200ps (maximum)
• Propagation delay: 550ps (maximum)
• Additive phase jitter, RMS: 0.09ps (typical)
• Full 2.5V supply mode
• -40°C to 85°C ambient operating temperature
• Available in lead-free (RoHS 6) package

The FCT20807 is a 2.5V compatible, high speed, low noise, 1:10 fanout, non-inverting clock buffer. The large fanout from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. Providing output to output skew as low as 150ps, the FCT20807 is an ideal clock distribution device for synchronous systems. Multiple power and grounds reduce noise. Typical applications are clock and signal distribution.

• High frequency > 150MHz
• Guaranteed low skew < 150ps (max.) between any two outputs
• Very low duty cycle distortion < 300ps
• High speed: propagation delay < 3ns
• Very low CMOS power levels
• TTL compatible inputs and outputs
• 1:10 fanout
• Maximum output rise and fall time < 1.25ns (max.)
• Low input capacitance: 3pF typical
• 2.5V supply voltage
• Available in SSOP and QSOP packages

Buffer -- Buffer, 8, LVCMOS, 0 - 200, 50

3.3V CMOS Buffer/Clock Driver

2-output 1.8V PCIe Zero-Delay/Fanout Clock Buffer

2-output 3.3 V PCIe Gen1-2-3 Zero Delay / Fanout Buffer

Fanout Buffer, 4-output 3.3 V PCIe Gen1-2-3 Zero Delay

3.3V CMOS Buffer/Clock Driver

Low skew, 1-to-10 LVCMOS / LVTTL Fanout Buffer

Fanout Buffer, 2-output Differential Buffer for PCIe Gen2

2-output Differential Buffer For PCIe Gen2

3.3V 1:5 Clock Driver

Dual 1:5 Clock driver, LVCMOS, 3.3V, -40 to 85'C

1.8V to 3.3V 1:2 LVCMOS High Performance Clock Buffer

1:8, LVDS Output Fanout Buffer

Clock Buffer,19-Output DB1900Z PCIe Zero-Delay/Fanout Clock Buffer

Low Skew 1 to 4 Clock Buffer

Clock Fanout Buffer (Distribution) IC 1:10 200MHz 24-TSSOP (0.173, 4.40mm Width

1.8V to 3.3V 1:2 LVCMOS High Performance Clock Buffer

Programmable Fanout Buffer

Low Additive Jitter 2:8 Buffer with Universal Differential Outputs

6-output Differential Buffer For PCIe Gen2

8-output Differential Buffer for PCIe Gen2

Clock Fanout Buffer Low Skew 1 to 4 Clock Buffer

Low Skew,1-to-5 Differential-to-2.5V,3.3V LVPECL/ECL Fanout Buffer

8-output 3.3 V PCIe Gen1-2-3 Zero Delay / Fanout Buffer

Clock Fanout Buffer (Distribution) IC 1:4 200MHz 8-UFDFN

Low Skew 1 to 4 Clock Buffer

1:2 Clock Fanout Buffer and Frequency Divider

Low Skew, 1-to-12 LVCMOS/LVTTL Clock Multiplier/Zero Delay Buffer

Clock Buffer, 3.3V CMOS 1-to-10 Clock Driver

Clock Buffer, 3.3V CMOS 1-to-10 Clock Driver

3.3V Zero Delay Clock Buffer, Spread Spectrum Compatible

PLL for IA & Pwr SYS 1.2 Hz LVCMOS 3 In

Clock Buffer IC CLK BUFFER ZD PLL 3.3V 8-SOIC

Clock Buffer IC CLK BUFFER ZD PLL 3.3V 8-SOIC

Clock Buffer,IC 400MHz 1 Output 64-VFQFPN

Clock Buffer,IC 400MHz 1 Output 64-VFQFPN

2.5V LVDS,1:6 Clock Buffer Terabuffer

1:2 Fanout Buffer With Pre-Emphasis